Designing Of Time-delay Coding Decoder Using SOPC Technology

Under the terms that algorithm of the linear frequency modulation time-delay coding and decoding which is being used in underwater acoustic communication has been simulated successfully, this thesis mainly discussed the hardware design about the algorithm.The decoder design that discussed in this thesis is a complementary and improved job for the project of underwater acoustic communication system in our laboratory. The subject research plan of this decoder system proposed a performance index: real-time decoding, and asked to realize the system on a single chip. So during the system design process, we always follow the index to design every function module, after each module have been designed and completed, it should be passed strict simulation test. The hardware platform where the decoder system is designed is the DE2 board produced by Altera Company. The FPGA chip (CycloneII EP2C35) and outside interface plug-in package on this board were utilized only.This thesis mainly discussed such contents: the further researching for relevant algorithm about underwater acoustic communication, and emphasizing on the algorithm of linear frequency modulation time delay coding and decoding; The modifying for algorithm according to the actual need in the system design process; Having improved the deficiency of the previous work, and optimized the timing of DDC; Designing the multiple correlation module using FPGA technology, which enhanced the system's processing speed, and made the real-time receiving become possible; After comparing three algorithms of peak detecting, we chose the adaptive algorithm in out system design, which ensured the accuracy of our decoder's decoding. This thesis made use of SOPC technology to design NiosII embedded processor and relevant peripherals, including the universal asynchronous transceivers (UART) which is used for communication with the PC , and developed the application program based on NiosII processor, including time delay estimate, decode and serial communication.The test result indicates that this decoder completely accords the designing requirement, having realized real-time decoding, and reduced bit error rate to 0.01%, which has reached the level of practical application basically.