Hardware Implementation Of H.264 Encoder Based On FPGA

Though the H.264 video coding system can be realized by software, the entire coding system's algorithm which has a large number of mathematical operations is so complex that the computation is poor and makes the bus congested. Though the hardware is of poor flexibility and reusability and makes use of many resources, it has high speed calculation ability. So in order to shorten the whole time which the coding takes and improve the efficiency of the coding system, it is much better to realize the system by hardware than by software. This article is based on the idea above to realize the H.264 by the use of FPGA which has rich internal resources. In this paper, the system design process is as follows. Firstly, it translates the PAL standard data from the camera to the ITU656 digital video data by the use of video decoder chip SAA7113. Then FPGA reads the data and makes prediction, transformation and coding. Finally the coded stream will be sent to the PC by the USB interface. The data received by PC is decoded and shown.