SOC Design For The Non-blocking Switches Chip Of CSIX-L1 Interface

CSIX_L1 is one of the common interface standards in the design of large-capacity switches in recent years, adapting for ATM, IP, MPLS, Ethernet and similar communications. Therefore, the design and development of CSIX-L1 switch chips has a good practical value and market prospect.This paper focuses on how to settle a cell mutual adapter between the network processor (NP) chip which conforms to CSEXL1 interface and the non-blocking switch, on the basis of many years of researching on the cross-bar switch structure and the IP nucleus implementation. A proposal based on the non-blocking switch SOC chip with CSIX-L1 interface is also provided. This proposal, taking the Cross-bar switch structure IP nucleus as a core, unifies the characteristics of the CSIX-L1 interface, which is easy to expand to realize a high speed expandable conventional data package of switch. In order to have the original Cross-bar non-blocking switch structure IP nucleus meet the standards of CSIXL1 interface, we design a receiving and dispatching module in front of the IP nucleus interface. The receiving and dispatching module completes two kinds of cell formats conversion, realizing the intercommunication between the NP chip which meets the standards of CSEX-L1 and the non-blocking switch cell. The paper briefly introduces the overall structure design of SOC chips, describes the CSIX interface protocol, and explains the format of the CSIX-L1 data frames in detail. Then a specified description of how to design the receiving and dispatching module, using the existing switch IP core, to satisfy the standards of CSIX-L1 interface is provided. Finally, functional verification is carried on the switch module with ModelSim6.1 simulation software. The switch module is downloaded to the hardware development board and the output wave is analyzed using the mix oscilloscope. In addition, we do an experiment on the serial communication between the hardware development board and the computer, so as to test the switch SOC module.The main innovations of this paper include: 1) Design the cell transformation module which has met with the CSIX-L1 interface, and provide the interface communication mechanism which simultaneously satisfy the requirements of the receiving and dispatching module. 2) Realize the integration design of each sub-module of SOC chip plan and the integration test.