Design Of The Interface Circuit For C/V Integrated Capacitive Humidity Sensor

Capacitive sensor is a kind of important sensor among the huge sensor catalogues. Based on the charging and discharging principles, the capacitive sensors can convert the capacitance values varied with the detected parameters into voltages, currents, frequencies or other parameters for easily testing and transmitting. The capacitive sensors are now widely used in humidity, temperature, displacement, pressure and other detection fields. However, because of the change in capacitance is very small, the general order of magnitude is pF, it seems that using application-specific integrated interface circuits for micro-capacitance detecting and processing is an important method.In order to achieve high precision micro-capacitance detection, the design of an interface circuit for a C/V conversion CMOS integrated capacitive humidity sensors is provided based on charging and discharging principles in this paper. The interface circuit is mainly composed of an operational amplifier and a switched-capacitor circuit. The design of the operational amplifier is the core part of the circuit design. According to the requirements of the operational amplifier structure for the interface circuit, a two-stage operational amplifier structure is applied. The first stage of the operational amplifier in the circuit is a folded cascode amplifier supplying a higher gain, the second stage is a common-source amplifier supplying a greater output swing and the bias currents are supplied by a reference current source. The switched-capacitor circuit completes the capacitance detection based on the charging and discharging principles. The accuracy of the circuit is highly improved by using CMOS analog switches. Based on CSMC 0.6μm CMOS process, set the parameters of each transistor, and then simulate the circuit by HSpice software and adjust the parameters. The simulation results show that: the open-loop gain of the op amp is 91.842dB, the phase margin is 58°, the 3dB bandwidth is 1KHz and the unity gain bandwidth is 14.042MHz, which meets the work requirements of the interface circuits. The output voltage of the whole interface circuit is a symmetrical square wave signal with the same frequency of the input voltage. The voltage amplitude varies with the changes of the sensing capacitance. When the capacitance changes from 10pF to 15pF, the output voltage will changes from 0.5V to 2.3V and the sensing capacitance changes 0.01pF, the output voltage will change 3.6mV, which fulfils the micro-capacitance detection. Finally the interface circuit layout is designed. Because of taking fully account of the device matching characteristics, such design reduces the device parasitics and improves the circuit performances. Then the correctness of the layout is verified by design rule checking and layout versus schematic.Compared with the traditional interface circuit, this interface circuit has the characteristics of large gain, high resolution, simple and the compatibility with CMOS process. It is applicable to most capacitive sensors, so as to implement better micro-capacitance detection.