GP Optimization Design Of Rotary Traveling Waye Oscillator Array And 60GHz VCO Design

This thesis presents the optimization of rotary traveling wave oscillator arrays and the design of 60 GHz VCO.First,an efficient method for globally optimizing and automating component sizing for rotary traveling wave oscillator arrays is presented.The lumped equivalent model of transmission lines loaded by inverter pairs is evaluated together with all performance measures expressions.Some improvements are made based on our former work:1,The lumped equivalent model of transmission lines,the capacitance model of inverters and the model of phase noise are all improved:2.Our simulation is based on the design kit provided by SMIC,and the veracity of simulation results is strongly improved;3,Our previous work only proved the effectiveness of GP on a single RTWO loop.But in this paper,we extend our work to an RTWOA and the optimization of the clock network is realized.We have applied our GP-based methodology to four design cases.All optimization results show the high efficiency and feasibility of GP method.The globally optimal trade-off curves between competing objectives are also computed to carry out robust designs and quickly explore the design space.In the last chapter,a 60GHz VCO based on RTWO is designed.A multiphase oscillator suitable for 30/60-GHz dual-band applications is presented.In the circuit implementation,the 30-GHz fundamental VCO is realized by a RTWO,while frequency doublers are adopted to generate the output signals at the 60-GHz frequency band.To achieve the required output phases with low close-in phase noise,a rotary traveling-wave topology is employed for the 30-GHz fundamental oscillator.Using a SMIC 0.13μm CMOS process,a 60 GHz VCO is designed.The circuit exhibits a frequency tuning range of 5 GHz.The simulated phase noise at 1-MHz offset is lower than-100 dBc/Hz within the entire frequency range.