| As the device used to interconnect heterogeneous networks, the gateway can perform the functions of different architecture networks interconnection with diverse communication protocols and application protocols, and the conversion of complex protocols. Integrating the advantages of programmable functions, good portability, scalability, high-performance, and so on, the gateway based on the network processor can meet the networks'requirements for broadband and intelligence. In addition, the bandwidth is an important aspect in the measurement and evaluation of network performance, ensuring quality of service, traffic control and traffic engineering.This dissertation summarizes the principles of heterogeneous networks interconnection and several techniques for end-to-end bandwidth measurement. The hardware & software architecture, function and implementation of each module for the Multi-network Gateway are addressed. The focus of this dissertation puts on the implementation of control module in the multi-network gateway, the design and implementation for sub-module of the microcomputer interface, programmable clock, V.35 interface control and others through Very high speed integrated circuit Hardware Description Language (VHDL). Meanwhile, the logic synthesis and simulation of each sub-module are fulfilled. By downloading profile to the programmable logic device, this dissertation accomplishes the joint debugging between the control module and whole system, and the test result shows that the module designed works normally. Secondly, this dissertation designs the bottleneck bandwidth measurement software for the platform based on the network processor, which is used to measure end-to-end bottleneck bandwidth. In addition, the measurement scheme of the input- and output- port rates for the multi-network gateway is designed. The work done in this dissertation provides a good hardware platform support for the further development of network processor software on the data plane. |
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