Design And Implementation Ofinteger-pixel Motion Estimation Circuit Based On H.264/avc Coding Standard |
| Posted on:2011-03-29 | Degree:Master | Type:Thesis |
| Country:China | Candidate:F M Wu | Full Text:PDF |
| GTID:2178360308453438 | Subject:Software engineering |
| Abstract/Summary: | PDF Full Text Request |
| Inter prediction is a very important part of video coding system. It removes huge temporal redundancy between video sequences which makes high quality video compressing possible. Motion estimation (ME) is an important part of inter prediction and consumes the most computational part of video coding and requires hardware for real-time implementation.ME calculation is computing-costing with high data throughput. In this paper we firstly introduce the background of ME, then analyze formal solutions of ME circuits. Based on carefully studies on variable block motion estimation and full search block matching algorithm, a new structure is implemented in this thesis to handle real-time video encoding. This proposed pipe-lined systolic structure makes good use of data overlap in motion search and is high-performance low-bandwidth structured and can handle VBSME(variable block size motion estimation). This Paper presents the detail designation and introduces a verification flow for the structure proposed. Floorplan and partly verification is done at last. |
| Keywords/Search Tags: | motion estimation, systolic array, HDTV, VBSME |
PDF Full Text Request |
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