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Gps Receiver Antenna Array Anti-jamming Algorithm And Its Fpga Implementation

Posted on:2009-09-26Degree:MasterType:Thesis
Country:ChinaCandidate:R WanFull Text:PDF
GTID:2190360245461134Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
GPS has a great impact on navigation, positioning and precise hit, and it has been widely used in the American weapons. However, it shows many problems in the anti-jamming environment. Owing to the faint signal that arriving at the earth surface, easily be interfered in the complex electromagnetic surroundings, especially the C/A code signal, and it has became effective ways and means striving for navigation resources. So it is very significant to study the design of GPS receivers under jamming environments.Firstly, this paper simply introduces the form and structure of GPS signal, and gives a whole understanding of the receiver. By analyzing the characteristic of GPS signal, the anti-jamming ablity of GPS receiver and the method in which interference works on receiver, a conclusion that the oppressive interference is the most menace to GPS receiver is drawed. And then, an effective anti-jamming technique is put forward in allusion to the interference. Whereafter, this dissertation fastens one's attention upon the study of GPS anti-jamming means in the precondition of the anti-jamming technique. Several schemes are put forward, whose performance is analyzed and discussed in detail.During the research, the different antenna arrays are simulated and compared based on the understanding of the rules and special fitering. It gives a detailed discussion between space-time filtering and spacial filtering at the basis of circular array. Their advantages and disadvantages are given based on the simulation results. With a view to actual interference environment and the initial stage of this research, a suitable interference suppression algorithm is presented. Some improvements are made and the anti-jamming performance is greatly improved.Finally, the FPGA design's results are given in detail. The design flow and RTL drawing of vital modules are put forward. The experiment results shows the design in this thesis is valid.
Keywords/Search Tags:GPS, Anti-Jamming, Space, Space-Time, FPGA
PDF Full Text Request
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