Boost White Led Driver Chip Efficiency Technology Research

White LED as an environmental protection and energy saving light source has been widely accepted, and it has been widely used as LCD backlight of mobile phones, handheld devices, and high-power lighting areas. The traditional LED driver scheme has large volume, low conversion efficiency and high cost, and the general efficiency is only 60% coupled with the loss of the external current-limiting device, so the energy-saving advantages of the semiconductor lighting is disappeared. The driver chip with high conversion efficiency, low cost, high reliability is benefit for the popularization and promotion of LED in the lighting and backlighting fields.The high efficiency boost white LED driver IC designed in this paper has a wide range of applications which can be used not only in LCD backlighting, but also in LED lighting.The chip only needs a very small external inductor without external zener diodes. Compared with other driving circuits, it reduces the application cost and power.The driving technology of the white LED chip is studied systematically at first. According to the design requirements of this project, the topology of high efficiency boost DC_DC converter is chosen, and the working theory of the converter and the loss source are analyzed. This chip uses current mode PWM modulation, and it forms the voltage negative feedback loop by the external series LED and the current negative feedback loop composed by the sampling resistance and the current detecting module. This method can realize constant output voltage and current. High efficiency has close relation with low power. This requires that high efficiency and low power have to be considered together when designing the sub modules of the circuit, and the loss of every part in the circuit has to be considered. The basic theory and main frame of the key modules are analyzed, such as, multi-output voltage reference,1 MHz oscillator of fixed frequency, over temperature protection with hysteresis, current sampling, dynamic slope compensation,39V over voltage protection, high voltage LDMOS with low on-resistance, and the circuit structure is optimized, in order to improve the conversion efficiency of the entire circuit.This chip adopts CSMC 0.5μm BCD process to complete the design of the chip, and the simulation uses the spectre tool of cadence. The final layout area is 0.72mm×1.35mm. At present, the chip has been taped out successfully. After executing the overall test on the chip, the input voltage ranges from 2.8 to 5.5V, the output voltage is up to 38V, and the driving current can be adjusted by an external resistor from 15mA～300mA. The result meets the design goals and the conversion efficiency can reach above 94%.