An Improved Design Of Low Power Cyclic Analog-to-digital Converter

The infrared detection technology, as a main method of image information acquisition, has been widely used in industrial control, medical diagnosis, resource exploration and aerospace fields. With integrated Analog-to-Digital converter (ADC), IR Readout circuit chip effectively prevents the noise interference and improves the reliability and accuracy of detection.A new 10 bit 250 K samples per second (KSPS) analog to digital converter (ADC) for Long Line-Array Infrared Detector Readout Integrated Circuit (ROIC) is presented in this paper. The novel Cyclic ADC is an improved design comparing to the conventional architecture. Based on the requirement of system and the problem of conventional ADC, some circuits are improved.The Cyclic ADC with Redundant Signed Digit (RSD) algorithm has the advantages of simpler circuit configuration, less area consumption and lower power dissipation over many other ADC architectures and more tolerance to comparator offset error. With this circuit structure, the ADC's offset errors were also successfully corrected by proper choice of capacitor switching sequence. Based on the test result of conventional ADC, the MDAC, OpAmp and comparator circuits have been improved and they will be more proper to implementation of ADC in ROIC. In addition, the behavior simulation with Simulink is finished to ensure the correction of new ADC architectures and sub-circuits. In this work, the Cyclic RSD ADC is carefully designed and simulation results show a larger than 60 dB signal-to-noise ratio (SNR) and more than 9.8 bit ENOB (Effective Number of Bits) at 250 KSPS for the ADC with a 1.2 mW average power dissipation at 3.3 V power supply.