| Ultra Wideband (UWB) plays an important part in wireless communication field and is one of the research hotspots right now. This article is based on Dual-Carrier (DC) UWB wireless communication system standards, which provides a DC structure in RF part, so that the baseband signals will be modulated onto two different carriers. This structure reduces the requirements for some critical hardware implementations of RF and baseband circuits, achieves frequency diversity and improves the flexibility of use of the frequency spectrum. This article focus on the digital baseband chip design in DC UWB wireless communication system.This article describes the overall architecture of the digital baseband, clocking approach, reseting approach, UART configuration approach and frame checking approach, the principle and some hardware implementations of transmitter, focuses on four key modules in receiver, introduces the algorithm of synchronization module and channel estimation module, and in depth studies the CFO/IQ mismatch estimation and compensation module and RCFO/SFO estimattion and compensation module. Carrier frequency offset (CFO) is caused by the carrier frequency deviation of RF transmitter and RF receiver, which introduces the ICI (Inter Carrier Interference ICI) within the OFDM symbols, IQ mismatch is caused by the difference between I path and Q path (such as the filters are not exactly the same), which introduces the image frequency interference of the ideal signal, sampling frequency offset (SFO) is caused by the sampling clock frequency deviation of DAC in transmitter and ADC in receiver, which also introduces ICI, after the CFO compensation, residual carrier frequency offset (RCFO) exists. these non-ideal factors will worsen the system performance, therefore need to be estimated and compensated. this article proposes a novel joint estimation and compensation algorithm, which estimates and compensates CFO and IQ imbalance in time domain, while Residual Carrier Frequency Offset (RCFO) and SFO in frequency domain. the algorithm uses fewer data supporting resources, improves the estimation accuracy, reduces the bit error rate (BER) and improves the system performance. We also provide the hardware implementations of some critical circuits and arithmetic units in these four key modules in receiver. |