| Pipeline ADC is widely used in the video signal processing, high resolution images and medical imaging field as connecting the interface of analog signal and digital signal. Compared with other types of ADC converter, pipeline ADC has a very good compromise in power, accuracy and speed. In some occasion, transform precision of pipeline ADC should reach more than 10 bits and the transform rate should reach dozens or even hundreds of megabytes. It can well realize the performance requirements of pipeline ADC.In this paper, it has designed a 12 bits 40 Msps pipeline ADC based on CMOS 0.35μm process in the circumstance of Aether Spectre. The whole structure is implemented by using the first 10 level is 1.5 bits/level while the last level is 2bits/level Flash ADC, in total 11 levels, mainly includes analog part and digital part. Analog part includes sampling hold(S/H) circuit, Sub-ADC circuit, margin residue gain circuit(MDAC),basing circuit, clock generating circuit, etc. Digital part includes delay circuit and digital correction circuit.Simulation results show that when the power supply voltage is 3.3V, sampling frequency is 40 MHz, the ac small signal gain of gain-boost AMP is 62 dB, GBW is 110 MHz, phase margin is 74°, CMFB is 1V, the accuracy of pipeline ADC can reach 12 bits, power consumption is 59.5mW and the whole layout area is 1.4mm2, which can meet the Pipeline ADC performance requirements. |
