Layout Of Dynamic Stochastic Memory Based On 2T GC And Its Key Parameter Characterization And Optimization

2T GC is a new type of embedded dynamic random access memory.This work focus on2T GC layout design and the characterization and optimization of two key parameters which includes standby leakage and data retention.While the2T GC layout design contain three parts.The first one is the cell layout design which should consider the cell area and the cell storage performance.The second one is the storage array layout design and the on pitch peripheral circuit layout design which should consider the multidivision of memory array and the data line arrangments;and the third one is the off pitch peripheral circuit floorplan and the problem which should be considered when the overall layout designing. Then the paper analysis the standby leakage of2T GC cell and propose a scheme which characterize it and then study the optimization of cell standby leakage. Data retention is another key parameter of2T GC,with the scaling of advanced process technology the PVT variation is more and more significant,2T GC is dynamic random access memory so it requires periodic refresh,while the refresh cycle is determined by the data retention, therefore the characterization of data retention variability is meaningful.In this paper, first a128kb2T GC memory chip layout is designed and realized based on SMIC0.13um process with correct storage capability;second, the characterization of cell standby leakage and data retention is realized based on SMIC65nm process.