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Total Control. Dtv Channel Receiver Chip Implementation For Integrated Design And Test

Posted on:2005-02-16Degree:MasterType:Thesis
Country:ChinaCandidate:M ShaFull Text:PDF
GTID:2208360122971318Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Digital High Definition Television (Digital HDTV), as the third era Television Standard, has become the focus of contest in the countries all over the world. It will affect the world's politics, economy and culture greatly. The core chip of system, which implies The Standard directly, has the most greatest technology value. It is very important to design and produce core chips provided with independent intelligence property both for marketing and financial reasons.Growing market demand drives IC industry increasing ceaselessly. With the deep sub-micron process being mainstream technique in semiconductor production, the shrinking scale and the expanding size & complexity bring about a series of severe problems, which poses a great challenge on ASIC (Application Specific Integrated Circuits) design. We must consider synthesis and test requirements in the early time of front-end design.This paper focuses on principles of the controller in DTV (Digital Television) channel receiving chip and its realization in ASIC. After that, it introduces strategies of designing for verification & test, and put forward some design skills at the same time.In this paper, the first chapter gives an overview of HDTV, and then talks about the technology involved in ASIC. The second chapter focuses on the strategy and realization of controller in DTV chip. After analyzing the methods of controlling chips in both outward and inward ways, it describes I2C (Inter IC BUS) interface and EMCU (Embedded Microcontroller Unit) thoroughly. The third chapter gives proper means of getting valid chip: sufficient verification in design phase and full test in manufacture phase. It discusses the architecture of testbench in functional verification of DTV chip and detailed accounts realization of memory BIST (Build In Self Test) method. The fourth chapter combines references and my own experience; brings forward some skills of design for synthesis, verification and test in early front-end design phase.The main contributions of this paper are proposing the architecture and controlling method, as well as implementing it in ASIC of DTV system. Especially that it brings forward strategies and skills of design for synthesis, verification and test in early front-end design phase by references and practical experience.
Keywords/Search Tags:HDTV, ASIC, SOC, I2C, MCU, BIST, DFT
PDF Full Text Request
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