Today, research in the technology of ITS(intelligent transport system)is a hotspot because of the con radiction between capacity and demand of traffic road and the need cf building up a real time and effective traffic manage system over a large area. As a technology basis of ITS, research of DSRC (Dedicated Short RangeCommunication)is necessarily.This paper mainly introduce the design and redressal of RF transreceiver circuit in On_Bus_Unit(OEU) of DSRC.The firt part of it is some elements of transreceiver circuit and the second is detailed design of individual part circuit, ending with some relational results.The performance of Frequency synthesizer , especially the phase noise figure, is critical to transreceiver system's overall performance, so this paper mainly fecus on the utilization of PLL technology and analysising of phase noise of PLL, and gives some meaningful instruction for actual transreceiver circuit design. |