Based On Sopc Peripherals Interface Design And Integration

With the increasing development towards system level chip, especially SoPC (system On a Programmable Chip), the programmable skill becomes one of the new developed fields of embedded system.It's easier to design the system in a chip because of the characteristic of reprogram ability of FPGA (Field Programmable Gate Array) and the development of software about the SoPC. FPGA design is more flexible than traditional embedded system design. Software and hardware can be customized and clipped in terms of user requirement. With more IP cores, modularization emerges. In that case we can plan a complex system within a short period. We could materialize a real SoPC that integrates the RISC and custom HDL code into a FPGA.After the serious research about the latest domestic and abroad data of SoPC, this subject selects FPGA(Field Programmable Gate Array) which embedded the PowerPC405 processor as the Programmable system to design a SoPC system to meet the requirement that integrate the peripherals of 1553B protocol,UART protocol andetc..The paper introduces the SoPC developed process and IP core design method firstly, after that, the emphases are the modeling process with SystemC , establishment hiberarchy of SoPC and the design of IP cores, at last, these IP cores are integrated into the FPGA including interrupt handlers and device drivers. Above all, they are the ways to realize a SoPC system.Relatively speaking for the traditional solution of embedded system, the methodology based on embedded system that syncretizes microprocessor, programmable chip design and SH/HW codesign in this paper regulates the developing process, reduces the amount of chips and increases the reliability so as to realize easily, upgrade lightly, transplant expediently, achieve strong adjustability and expansibility.With the pioneer research of the subject, the production will provide a method for SoPC design that can be used for reference.