Turbo Product Codes Chase Iterative Decoding Algorithm And Realization

With fast development of the communication technologies, increasing data rate and improving the quality of service of the communication system have become hot topic. Channel coding is one of most effective and economical methods to achieve the above objectives. In wireless communication system, the channel coding is one of the most significant components and key technology. As an important technology in channel coding, the forward error correction (FEC) can enhance the reliability of the reliability of the information transmission and improve the system performance. A new kind of the FEC, called turbo product code (TPC), whose performance in terms of bit error is close to Shannon limit, is introduced to modern communication system and has been widely used. However, one problem of implemention of the TPC is that great deals of calculations are required during in decoding. This thesis mainly focuses on reducing the implementation complexity as well as the decoding latency, and proposes an efficient TPC decoding algorithm.Firstly, the digital communication system model is briefly introduced, and then the description of channel coding theory is provided.Secondly, the traditional Chase algorithm is mainly discussed, and the basic step of the implementation of this decoding algorithm is given. The description of iteration decoding algorithm for turbo product code is provided in detail. The calculation of the extrinsic information, which is needed in the decoding, is also discussed. In addition, we discuss the factors which have effect on the performance of the decoding of turbo product code. In order to reduce the implementation complexity and shorten the decoding latency, we propose an efficient Chase algorithm. The efficient Chase algorithm presented here uses conventionally ordered test patterns, and the syndromes as well as the extrinsic information are obtained with a minimum number of operations. Therefore, the decoding complexity is greatly reduced and there is no performance loss.Lastly, a hardware system of implementing the turbo product code is given, where the interface circuits of the system are implemented by FPGA. In this system, both the encoding and decoding use the AHA4501 chip, which is the first TPC encoding and decoding chip of AHA Corporation. This chip can be controlled by programming the inter register. Furthermore, we introduce the inlialization flow of AHA4501, making sure that it can carry out the encoding and decoding of the turbo product code.