Uhf Rfid Systems Capture Effects Of Anti-collision Algorithm Research And Reader Code Synchronizer Design

In this thesis, two of the key techniques in passive UHF RFID systems based on ISO18000-6C standard are studied. One is the analysis and design of multi-tag anti-collision algorithm considering capture effect, the other is the all-digitial symbol synchronizer design of passive UHF RFID reader.Capture effect is ubiquitous in passive UHF RFID systems. By transforming collided slots to successfully identified slots, Capture effect can remarkablely improve the system throughput and therefore becomes a research focus in this area currently. In this thesis, a novel Capture model for passive UHF RFID systems is firstly presented, which considers the characteristics of RFID reader, indoor radio channel, backscattering and spatial distribution of passive tags. Experimental results measured at a warehouse show that the presented Capture model is more accurate than exsiting ones. Based on Capture effect, a novel anti-collision algorithm is then developed, showing a performance improvement than traditional ones. Also, the performance limit of Aloha-based anti-collision algorithms under Capture effect is theoretically derived.Compared with anti-collision algorithm design, which is a MAC (Medium Access Control) layer method to improve system performance, symbol synchronizer design is a physical layer approach to achieve better performance. Symbol synchronizer is part of reader digital receiver, which is responsible for symbol rate and phase synchronization, demodulation, decoding for 40KHz-640KHz FMO/Miller signal. Due to±22% data rate drift of tag backscattering signal, the symbol synchronizer design is the most difficult in digital receiver design. Traditional symbol synchronizers are mostly based on Correlator, and have disadvantages of large resource consumption and low accuracy of symbol synchronization. In this thesis, we present a symbol synchronizer based on digital PLL and interpolation, which avoids the disadvantages mentioned above. Simulation results show the digital receiver equipped with this DPLL-based symbol synchronizer outperforms existing works in SNR-BER performance and resource consumption.