Font Size: a A A

Study Of The Bit Pattern Interpolation Controller Based On CPLD

Posted on:2012-11-30Degree:MasterType:Thesis
Country:ChinaCandidate:J L CaoFull Text:PDF
GTID:2211330368488432Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
Bit pattern interpolation has many advantages such as simple ideas, easy implementation and stable performance, and finds its use in the field for complex curve interpolation and high-speed interpolations. This interpolation technology is researched more mature by NOVA Corporation in Japan. The company develops MCX motion control chip which integrates the function of bit pattern interpolation. The users can achieve bit pattern interpolation via setting relevant registers in the chip. However, the market price of this special chip is relatively expensive, and the algorithm of which is not open to outside world. Moreover, the chip can not achieve the acceleration and deceleration control in the mode of the bit pattern interpolation. This paper studied the algorithm of bit pattern interpolation controller based on CPLD, together with the solution of the acceleration and deceleration functions..The thesis is divided into six chapters. The first chapter gives an introduction to the background of interpolation technology development and basic methods, sketched related technologies of EDA, and elaborate the significance, ideas and content of this research. The second chapter provides an analysis for the theory of bit pattern interpolation, and shows the architecture of bit pattern interpolation controller designed in our research, finally discussed the method of generation of bit streams which are the input data of bit-pattern interpolation. The third chapter explains how to implement the data input and output management module and the bit pattern interpolation control module. The fourth chapter deals with the implementation of acceleration and deceleration control module and manual feed module. The fifth chapter briefly analyses the structure of development system and gives out a schematic and PCB circuit for prototyping. The sixth chapter is the conclusion of the works.This paper has finished fundamental and comprehensive solution bit-pattern interpolation controller, which is feasible but still need further improving.
Keywords/Search Tags:Bit Pattern Interpolation, Acceleration and Deceleration Control, CPLD, Verilog, EDA
PDF Full Text Request
Related items