On Verification Of Front Side Bus For Processor Module Of Protection Systems

Nuclear safety rules demand that verification and validation work need to be done in class 1 nuclear digital system which implements safety control in case of accident. In order to increase the safety of nuclear plant, IAEA and National Nuclear Security Administration consider that CCF still exists in CEC, and make new requirements for verification and validation. These requirements can't be made according to IEEE standards. Until now there is still no recognized method for these systems.This paper is based on the making activity of state's standard about the verification and validation work with National Nuclear Security Administration, and take the Front Side Bus as an example, and research the methods of verification and validation for CEC, and provide technical supports for nuclear digital protection system.1. Attend in the activity of making the standard of verification and validation for CEC .2. Analyze the protocol and the transaction timing of Front Side Bus, write the HDL program of Front Side Bus. 3. According to the verification guidelines for programmable CEC of IEC62566, and then integrate current mainstream verification technologies to make comprehensive strict simulation and verification, then list simulation waves, research assertion based verification method nd test coverage method. Then give the corresponding reports.4. Take FPGA as the object of study, analyze failure modes in nuclear digital protection system , build Markov model in order to do reliability analysis, then research the relationship between failure rateλ,repair rateμand reliability index, and do quantitative analysis.