Dynamic Packet Fragmentation And Scheduling For Feedback Flow Control On Network-on-chip

System-on-chip (SoC) is a design methodology to integrate multiple function cores onto a single silicon chip. In recent years, As the number of processor, memory and hardware cores available on the chip increases, bus infrastructure can't meet real-time SoC constraints. In order to solve the problem of big communication delay and scalability, network on chip (NoC) brings a networking method to on-chip communication replacing of share-bus. Given the topology, switching technique and routing strategy, the flow control scheme is another crucial factor that determines the efficiency of a NoC. As for the limitation of load for system in the application, if a node turns into blocking, the performance of system will be seriously reduced, or even paralyzed. The rate of injecting packets into the network should be regulated carefully which is the responsibility of flow control.To solve these problems, we proposed the Communication based Feedback (CFB). In this paper, we model the network and the end to end communication, and then we model the relationship of Congestion-Level and the rate of data injection as a math function. At last, we describe the sender protocol and receiver protocol.The CFB mechanism guarantees the congestion level within the boundary given by system by adjusting the packet length and scheduling the intervals between two sending packets dynamically at sending end. As the reception of the receiver is unknown, we get the congestion level by establishing detection mechanism at the receiving end. Though Feedback Controller (FC), the feedback message will be posted to sender by receiver. The sender adjusts the data flow using this feedback message. As the deadlock may occur in message travelling, we proposed a two-time message forward mechanism. Deadlock can be solved and the delay by message travelling will be reduced.We implement the routers, network interface and message repeater by support CFB based on hardware description language at the hardware level. Then we synthesize the function module into Xilinx FPGA chip and simulate the system. At the same time in order to verify the performance of CFB flow control mechanism, we developed on-chip network simulation platform (Nosim) at software level. Through the simulation at both balanced traffic flow models and hotspots models on the 2D-MESH topology of the network on-chip, experimental results show that the proposed CFB flow control mechanism save the use of the system cache effectively, reduce the system load significantly, and be better than other similar methods. Additionally CFB makes a compromise with the communication delay and area compare with other flow controls. Network emulation fully validated the superiority of CFB flow control mechanism.