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Design And Implementation Of Shortwave Channel Simulator Based On Watterson Model

Posted on:2012-09-05Degree:MasterType:Thesis
Country:ChinaCandidate:Z LiuFull Text:PDF
GTID:2218330368982565Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Wireless long distance communication is more and more close to human's daily lives. Compare to the commercial cell communications and satellite communications, shortwave communications is always unreplaceable as a well anti-destroy and low-cost propagation form. Short-skywave channel is a typical random-parameter and dispersive channel. Unstable ionosphere has a serious fading effect to the shortwave signals that causes a bad communication qualities. Compare to complex outdoor experiments, shortwave simulation and test in laboratory environment is necessary and economical. Now most shortwave channel simulators were non-realtime and narrowband, which had a bottleneck in wideband or realtime signal simulation output. Based on the above reason, this paper proposes a research and implementation of hardware shortwave channel simulator, and emphasis on solving the real-time process problem.First, research and implementation at hardware and software project of the shortwave channel simulator based on Watterson model was proposed in this paper. At the hardware part, a simulation method was given and implemented, which configuration is based on a core process unit with FPGA as host processor and DSP as coprocessor. With a pertinence to solve the realtime simulation signals output, this paper utilizes the pipeline configuration of FPGA. Based on the software radio theory, a peripheral system including high speed sample and output devices and a "MCU+DDS" mixer was designed. With the adder peripheral as a cooperater for the core process unit, a hardware shortwave channel simulator platform was conceived and implemented.Second, at the software part, a real-time arithmetic with pipeline process structure for the shortwave channel simulator was proposed. The software project implements Multi-path by making use of the parallel process ability of FPGA. A method to simulate digital delay lines was proposed and validated that using finite random length FIFO generated by setting 1-N address dual-port RAM in each path. Aiming at the project of Doppler shift in mixer signal at back-end, a method that using perfect random bit flows captured from clock phase noise driving DDS to synthesize a random swarm Doppler shift signal was designed and validated in this paper. This method realizes an adjustable shift step and speed. Fade factors is a zero mean value and stationary normal distribution process generated by MATLAB through Box-Muller arithmetic and these fade number sequence stored in DSP RAM for reading. Gaussian white noise simulation is using converting Gaussian distribution number sequence generated by MATLAB to DA output.At last the shortwave simulation tests based on the implementation of hardware and software of the channel simulator was introduced. Experiments are executed about the parts of white noise output, Doppler shift output, two-paths and three-paths propagation etc. Results show that the hardware and software project achieves the 3.3ms delay space and 1Hz/s random Doppler Shift request. At a certain extent, the design can simulate the effect well that wireless signals had in shortwave channel.
Keywords/Search Tags:Shortwave Channel Simulator, Watterson Model, Multi-path Delay, Reaitime Process
PDF Full Text Request
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