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Design And Implementation Of Pulsed Eddy Current Testing Data Acquisition System Based On Embedded Dual-CPU

Posted on:2013-07-15Degree:MasterType:Thesis
Country:ChinaCandidate:Z LiuFull Text:PDF
GTID:2232330362471809Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
Pulsed Eddy Current Testing is nondestructive testing technology, which is widely usedin shipping, aviation, metallurgy, chemical industry, machinery and other industry. It hasmany traits such as simple structure, high sensitivity, good frequency characteristic,non-contact measurement and easy to automation and so on. It can detect the flaws of theweld joint or steel crack rapidly to ensure manufacturing quality and ease of post-detectionmaintenance. According to the characteristics of numerous data and high real-time in metalsurface cracks testing field, designing a quickness of strong, high accuracy, good stability,ease to operation of the new eddy current data acquisition system is a very necessarysubject.Based on the analysis of the basic principle of pulsed eddy current testing, this paperintroduces the composition of the typical pulsed eddy current system and analyzes relatedperformance indicators, and advances the embedded dual CPU eddy current testing theoverall scheme of the data acquisition system. In this scheme, the dual-CPU data acquisitionsystem is based on the chip TMS320F2812of DSP and the chip W77E58of MCU as thecore processor. And DSP is mainly responsible for realizing the algorithms of dataacquisition, digital filtering; MCU is mainly responsible for command control and themanagement of man-machine interface; And a dual-port RAM is used for the datatransferring and data sharing between the two processors; The acquiesced data is transmittedto PC by MCU, which can be follow-up analyzed off-line.The entire data acquisition system can be divided into hardware and software part. First,this paper introduces in detail the hardware design of the system, which including signalpre-processing module, the ADC converter module, the DSP peripheral circuit module,dual-port RAM modules, the CPLD module, microcontroller module, etc. Double-CPUcommunication through dual-port RAM, CPLD to time control of the MCU and DSPdevices, serial data into parallel data and MCU interface communication management areemphatically analyzed.Second, this paper describes system software design, which including the DSP programdesign, digital filters design, CPLD function design and MCU control management sectionin detail. DSP program design in CCS2.2,FIR filter design in MATLAB and implemented on the DSP,CPLD functional design and realization in Max+plus â…¡10.2,MCU programdesign and functional implementation in Keil uVision3and communication interfaceimplementation in VC6.0++are described in detail.Finally, the hardware modules and software modules of the data acquisition system aredebugged respectively and the overall are debugged after cascaded. The system conducts thecollected data for processing, and analyzes and solves the arisen problems. Theexperimental test results show that this system have a greater advantage in terms of accuracy,high speed and stability, and can upload the collected data to PC to analyze off-line. The lastpart of this paper makes the filter design and experimental analysis in detail, which makinggood foundation for the follow-up treatment.
Keywords/Search Tags:Pulse Eddy current Testing, dual-CPU (DSP+MCU), dual-port RAM, data acquisition
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