Simulation Research On Improving The Dynamica Avalanche Capability Of3.3KV Fast Recovery Power Diodes

On the background of the worldwide energy shortage and proposed needs forenvironment protection, modern power electronics which is on the base of powersemiconductor devices has been successfully applied in the fields of electric powersystem, transportation, communication, lighting, mining industrial production, andmedical equipment etc. In many applications, typically the bridge-type topologies,each power switching transistor should be used with an anti-paralleled Free-WheelingDiode (FWD). For a diode with high static blocking capability, because of the lowbackground doping, applied voltage far below the specified rated blocking voltage ofthe device and dynamic avalanche will set in. However, the dynamic avalancheproblem of this kind of high-voltage devices which hinder the FWD from being usedin high-voltage high frequency applications. This topic cuts the front-edge of thehigh-voltage diode research. The work of this dissertation is to improve the dynamicavalanche performance of the high-voltage power FWD especially the3.3kV.The key idea employed in these new structures is to lower the emitter efficientof anode, reduced local lifetime, with a Gaussian buffer layer, dynamic avalanche atthe active area have been suppressed. With a carefully junction termination design, theresistance structure is introduced, dynamic avalanche at the junction terminationregion have been eliminated, after a P type anode buffer layer is added. The majorworks in this dissertation are summarized as below:(1) In relation to the planer junction diode, key parameters of the dynamicavalanche capability which including: anode P type doping, base width, lifetimecontrol and Gaussian buffer structure are proposed. Simulation result show thatdynamic capability improved by about63%at active region, compared with thereference diode.(2) Terminations of different type namely JTE and VLD which is rating for3.3kVdevices have been designed, the termination efficiency exceeding90%, thedynamic avalanche capability of VLD and JTE were compared at first time bysimulation, and VLD showing an improved dynamic ruggedness.(3) P type buffer realized junction extent region were innovative researched as themeans by improving dynamic avalanche capability in the termination region.Dynamic avalanche proposed current filament were successfully eliminated,dynamic avalanche capability in the termination region were improved by about35%.(4) On the base of the active area research results, a diode structure witch is with agreatly improved dynamic avalanche capability been proposed. The maximalpower density at turn-off is2.14MW/cm2, without destroying the diode.The numerical analyses shows that the new structures can significantly improvethe dynamic avalanche performance of the3.3kV power FWD while the othercharacteristics meeting the requirements of application. These features make the workof this dissertation inherent a certain practical significance of the fabrications ofhigh-performance3.3kV silicon power FWD.