Research On Decoders For Non-binary LDPC Codes

With the development of modern digital communication, LDPC codes attract much attention from both industry and academic society because its excellent error correction capability. On the other hand, lots of research work has been devoted to Non-binary LDPC codes. This paper concentrates on the design of LDPC decoders for various digital communication standards and the efficient VLSI architecture for Non-binary LDPC decoders.This dissertation presents a low-power decoder design approach for generic quasi-cyclic LDPC codes based on layered min-sum decoding algorithm. To reduce the energy consumption, a novel message length-shorten ing scheme is explored. The check node processing unit is accordingly optimized using bit-serial architecture. This low cost design scheme can greatly lower the power consumption while maintaining the necessary throughput. We further demonstrate the benefits of the proposed techniques by applying the new architecture to the QC-LDPC codes in CMMB standard. The proposed design is more efficient than contemporary designs. Non-binary LDPC codes are better than binary ones when the code length is small or moderate. However, the real application of this kind of codes is limited by the high complexity of the decoding algorithms. Based on the Min-Max decoding algorithm, this dissertation presents a highly efficient decoding algorithm, which can reduce the message memory as well as the average number of iterations. In addition, a non-uniform quantization scheme is developed for reducing the word length while achieving similar performances compared to a conventional quantization scheme. Meanwhile, the corresponding decoder architecture is also proposed.At last, this dissertation discusses the efficient check node processing for Non-binary LDPC codes. A novel check node processing algorithm and check node processing unit architecture are proposed in this paper. This paper gives an example of620code length, rate1/2, GF(32) based Non-binary LDPC decoder implementation. This implementation is competitive among other published works.