Design Of20V N-Channel UMOS And Optimization Of Its Gate-drain Capacitance

With the rapid development of electronics industry, the power metal-oxide-semiconductor field effect transistors (Power MOSFETs) expand their applied scope and market, but also more excellent performance for power MOSFETs will be required at the same time. However, low voltage MOSFETs with trench-gate (trench MOSFETs, usually called as UMOS) must always guarantee the breakdown voltage and simultaneously achieve lower on-resistance and smaller parasitic capacitances, which are widely used in consumer electronics. The reduction of the capacitance between the gate and the drain is very important and useful especially. For completing the design of the20V N-channel UMOS and the optimization of its gate-drain capacitance, the trench depth, and the size of trench body contact and the oxide thickness underneath the trench gate bottom are objectives for investigation in this thesis.The relation between the trench depth and the main parameters of UMOS is researched firstly in this thesis. At the beginning, the simulation assumes that the width and the depth of the trench body contact and the gate oxide thickness are0.3μm and0.4μm and200A respectively. The result shows that the increase of the UMOS trench depth makes the drain-source breakdown voltage (BV) and on-resistance both decrease, and enlarges the gate-drain capacitance drastically. Although the ratio breakdown voltage is20V in this thesis, the actual breakdown voltage must have a certain tolerance to guarantee the breakdown voltage. According to the simulation results, the trench depth of UMOS is designed as1.3μm, where the UMOS gains the proper breakdown voltage21.48V. The specific on-resistance is11.03mΩ·mm2while VGS is biased4.5V, and the gate-drain capacitance is9.17E-02fF with VDS biased10.5V.The trench body contact allows the continuous reduction of cell pitch under the permission of the process, but also suppresses the activation of parasitic transistor. The current path is changed resulting in transfer of the breakdown point when the trench body contact is deeper and wider. So the relation between the trench body contact and the performance of UMOS is investigated. In order to ensure low on-resistance, final width and depth of the trench body contact are designed as0.3μm and0.6μm respectively based on simulation results. The breakdown voltage is kept21.48V and the specific on-resistance is11.02mΩ·mm2with4.5V bias between the gate electrode and source electrode as the condition for on-resistance test; the gate-drain capacitance is8.97E-02fF when a10.5V applies to drain and source.To obtain lower gate-drain capacitance, the effect that the oxide thickness under the gate trench has on the performance of UMOS is explored. The simulation results show that the breakdown voltage and the specific on-resistance are both increase when the oxide under the gate trench bottom becomes thicker, and reduction of the gate-drain capacitance happens at the same time. But there is a limitation on the improvement of breakdown voltage and the decrease of gate-drain capacitance. It means that the breakdown voltage and gate-drain capacitance of UMOS remained basically when the oxide under the gate trench bottom reaches a certain thickness.Based on the research about the trench depth and the oxide thickness under the gate trench bottom, two methods are given to optimize the gate-drain capacitance of UMOS. The first way is that trench depth and oxide thickness under the trench gate bottom are increased with other parameter remained the same as before. The breakdown voltage is improved and the gate-drain capacitance is reduced by thickening the oxide under the bottom of the gate trench; the on-resistance can be reduced owing to the deeper gate trench. By means of the simulation, the gate-drain capacitance is reduced by14.1%when the gate trench depth is1.7um and the oxide thickness under the gate trench bottom is320.1nm. The other one is the combination of the thickening of the bottom oxide of the trench to promote breakdown voltage and the increase of N-type dopant concentration in the epitaxial layer to reduce on-resistance, and other parameters stay the same. It shows that the gate-drain capacitance of UMOS has been reduced by22.3%and other parameters change slightly when the trench depth and the thickness of the bottom oxide are1.7μm and420.1nm respectively in the epitaxial layer, whose dopant concentration is6.54E16cm-3. The two methods will not improve the cost because of no extra mask needed in the optimization of the gate-drain capacitance.