Hardware Design Of Entropy Decoding And IQIT In H.264/AVC Video Decoder

H.264, the newest generation video coding standard, is jointly developed by the JVT (Joint Video Team), which is established by ITU-T and ISO/IEC. H.264has excellent compression performance and good network affinity. This thesis herein emphasizes on the implementation of H.264CAVLC decoder and IQIT module based on the baseline profile, which are applied to mobile equipments. The basic goal of this design is to meet the real-time decoding requirement of CIF video.According to H.264standard and the goal of this design, the author firstly optimizes the algorithms and architectures of CAVLC decoding and IQIT, and then completes the hardware design and RTL implementation of each module. This design takes into account the balance of speed, power consumption and area. In CAVLC decoder, the decoding of CoeffToken and TrailingOnes sign only needs one clock cycle, which can improve the processing speed. And the optimization of code tables can reduce power consumption and area. In IQIT, The methods of parallel structure and pipeline can increase computing ability, and optimizations of multiplication replaced by additions and shifts and division replaced by LUT can decrease power consumption.Besides the hardware design, the author analyzes the JM software reference model, extracts the input and output stream of the CAVLC module and IQIT module. Then, the author carries out functional simulation for CAVLC decoder and IQIT with VCS of Synopsys. The output results are compared with JM reference model, which proves the correctness of the design. After the functional verification, the author synthesizes the design with DC, and verifies the netlist that exported by DC with Formality and analyzes the performance of the design.This design uses TSMC0.18um CMOS technology when it is synthesized. The author gives the information of speed, power consumption and area of CAVLC decoder and IQIT in this paper, and then estimates maximum clock frequencies of these two modules. When decoding a macroblock in the worst case, the CAVLC decoder takes512clock cycles and the IQIT module takes253clock cycles. After analysis, the results show that these two modules both meet the real-time decoding requirements of CIF and4CIF video.