| The radar echo simulator is widely used in the design, development andVerification Processes of radar system for its Flexibility and highly practicalcharacteristic. With the background of a practical project, this dissertation focuses onthe design and implementation of a general airborne Synthetic Aperture Radar (SAR)based on FPGA. The main difficulties include the real-time simulation and immenseamount of computation. The main content and work in this dissertation can besummarized as follows:1. Upon a in-depth study of the operation principle of SAR and the basic theoriesof radar echo simulation, the dissertation concentrates on modeling and analyzingairborne SAR echo. The design introduces a SAR echo simulation algorithm based onthe equivalent scatterer coefficient, which has a significant advantage in hardwareimplementation and algorithm performance. Simulation results verify the correctness ofthe algorithm.2. According to the design requirements of the simulator and the simulationprocesses of algorithm, the simulator’s hardware platform is set up based on FPGA andPC. The core concept of hardware design is introduced in term of computation burden,hardware resource, feasibility and real-time analysis in detail.3. The implementation process of airborne SAR echo simulator is described inmore detail. The simulator is realized on basis of many optimization techniques ofdigital design including pipelines, parallel processing, modularity, cross clock domaintransfer and so on. Through the PC software configuration, the simulator can producedigital and analog signals with different radar system parameters and different size of scene.4. The SAR echo signal generated by simulator is evaluated qualitatively andquantitatively. The dissertation tests and verifies the digital and analog signals. Thecauses of error are analyzed. According to multiple tests and the project application, thesimulator has unfailing performance and steady operation.it can satisfy the need ofresearch on radar system. |
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