Baseband Processing Generic Technology Multi-core Parallel Algorithm Research

With the rapid development of modern communication technology, the requirement of transmission rate, system capacity and network performance in the broadband mobile communications is rising seriously. In order to deal with these requirements, the fourth generation (4G) mobile communication system, i.e. IMT-Advanced (International Mobile Telecommunications-Advanced) system, is proposed by the International Telecommunication Union (ITU). The IMT-Advanced system will adopt OFDM, MIMO, CoMP and other new techniques, which has higher requirements of signal processing capabilities, as well as the ability of data exchange between the various modules. So it is necessary to research and design multi-core digital signal processing architecture to support for massive parallel processing, and develop the EDA tools for the baseband design and the overall system design in order to adapt to the continuous development of new techniques in the furture. At the same time, the processing architecture should be able to meet the features of low-cost, smooth upgrading and rapid industrialization.Therefore, based on the major projects of the National Science and Technology named "Reaearch of general architectures of IMT-Advanced oriented baseband processing", the multi-core parallel processing of the baseband algorithm in IMT-Advanced systems is researched. And a general-purpose multi-cores verification platform is designed and implemented, which is suitable for parallel algorithms.The research work in this thesis is focues on:1) Building a multi-core parallel processing simulation environment, in which OpenMP shared memory parallel guidance statements are adopted.2) Building a multi-core parallel processing hardware verification platform based on the MicroBlaze configurable soft processor in Xilinx Vertex-5FPGA using C language and Verilog language.3) Designed and implemented the FFT algorithm in these two simulation platforms and verification platform, analysed the speed-up performance of multi-core parallel processing. 4) Designed and implemented the Viterbi decoding for the tail biting convolutional encoding and FIR filter based on polyphase decomposition in multi-core parallel processing and analysed the speed-up performance in the hardware verification platform.In summary, in this dissertation the multicore parallel algorithms in baseband signals processing are researched and a multi-cores hardware verification platform is designed, the FFT algorithm, Viterbi decoding, and FIR filters are implemented and tested. The verification results demonstrate the feasibility and effectiveness of multi-core parallel processing. The relationship between parallel efficiency and the processing scale is revealed.