Hardware-circuit Design And Realization For The Wireless Data Link

In recent years, as many sorts of data link systems are proposed by military branch of countries, the communications terminals of data link system are required to design as intelligence, standardization, wide bandwidth, versatility and high signal processing rate. The advanced wireless data link talked in this paper is designed for these demands.According to the project design requirements of the wireless data link communication system, the feasibility and implementation of hardware scheme will be discussed in detail. Followed, each unit of the circuits will be explained, including operating principle, implementation scheme, chip select and circuit design. At the last, the author will give out the test results, and propose improvement recommendations to solve the hardware flaw.The design idea of soft defined radio (SDR) is introduced in designing the wireless data link communication system. As thus, baseband processing unit is composed of high performance FPGA and its peripheral circuits, high speed A/D and D/A chips are used as data converter. The low-IF technology is used to reducing the difficulty of digital-to-analog conversion; quadrature modulation and demodulation is used in frequency conversion circuits to achieve single-conversion. Finally, the author works out a hardware platform for wireless data link communications system, which includes three RF transceiver channels and can work at3.0GHz-4.0GHz. The output power of the transmission channels is about10dBm. The AGC’s dynamic range is greater than60dB, and can offer a gain of50dB. A/D and D/A conversion circuit can complete analog-to-digital or digital-to-analog conversion with a100MHz bandwidth of the input signal. The test results showed that the wireless data link’s hardware-circuit introduced in this article meets the design objective, and it also can be taken as a reference for other design of communication circuits.