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Design And Implementation Of High-Speed Pcie Switching Backplane Based On CPCI Platform

Posted on:2014-01-26Degree:MasterType:Thesis
Country:ChinaCandidate:S S YangFull Text:PDF
GTID:2248330398472031Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of microprocessor technology, multimedia technology and network technology, the demand of mass data transmission and exchange on the system bandwidth is higher and higher. The traditional parallel bus bandwidth can no longer meet the needs of the current system, and is replaced by the third generation of high-speed serial bus which takes PCIE as the core. PCIE bus adopts point-to-point data transmission mode based on message exchange, which has excellent electrical performance. Besides, with advantages of high openness, high reliability, hot pluggability, easy reinforcement and low cost, CPCI platform is widely applied in the all kinds of fields. However, CPCI utilizes PCI bus as its data transmission channel. The limit of bandwidth severely obstructs its application development in high-speed and high-bandwidth fields.Targeted for the deficiency of PCI bus bandwidth, this paper introduced PCIE bus into CPCI platform, and completed developing high-speed PCIE switching backplane in CPCI platform. This paper first analyzed the key issues caused by PCIE signal interconnection in CPCI platform such as the signal integrity, power integrity and electromagnetic compatibility. According to the characteristics of topological structure in the PCIE bus, this paper then conducted detailed design for the overall switching structure and various functional modules, and completed the PCB lamination, layout and wiring of the high-speed switching backplane. In addition, the design adopted the method combines transmission line theory, PCIE wiring specifications and EDA simulation, and hence effectively confirmed the signal integrity of PCIE signal when transmitting on the PCB boards and high-speed connectors. Finally, the paper tested the indicators of high-speed PCIE switching backplane, found each PCIE data link can provide bandwidth of1.5Gbps and the overall switch capability of backplane is up to7.5Gbps; hence it verified the correctness and feasibility of the program.This paper introduced PCIE signal into CPCI platform so as to solve the coexistence of PCI bus and PCIE bus when connect differential equipment card in the platform of CPCI. As the backplane is featured with high switching capacity, this system can be widely applied in the fields like telecommunication equipment, network communication, industrial automation, aerospace and military equipment which have high demands in the mechanical and electrical properties for equipment. In the meantime, this paper also provided certain reference not only for introducing the CPCI platform to other high-speed serial buses, but also for the interconnection of other high-speed signals in CPCI backplane.
Keywords/Search Tags:PCIE, signal integrity, high-speed connector, CPCI
PDF Full Text Request
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