Weak Signal Acqusition And Asic Implementation Of Gnss Receiver

With the development of COMPASS Navigation System and the modernization of GPS (Global Positioning System), the GNSS (Global Navigation Satellite System) receivers tend to be compatible with multi-mode and multi-channel, and the research of miniaturization, high sensitivity, low-power, anti-interference, attitude determination and Ultra-tight coupling in inertial sensors has to be matured. So the receivers need to have a lot of complicated calculations. The chips of GNSS receiver have been used widely and need to complete a large number of complicated calculations. However, the complexity of computing will consume a lot of hardware resources in the hardware implementation. Therefore it has become the difficulty of the design to achieve the complex calculations on the GNSS receivers by using the limited hardware resources. According to this, the paper put forward to a novel design method of GNSS receivers which have a high-sensitivity and can be compatible with multi-mode and multi-channel. The design can effectively save hardware resources and do complex calculations accurately.The paper optimized the existing design of GNSS receivers in two aspects, and one of the optimization directions is to acquire the GNSS signals successfully in the weak signal environment by design a digital matched filter with low resource utilization and high performance. The other optimization is the optimization of tracking loop, including the multi-mode and multi-channel design, fixed-point tracking and digital circuit implementation. Finally, this paper studied the RTL (Register Transfer Level) implementation of GNSS receivers on the ASIC platform and implemented the design of a large-scale correlator and optimized tracking loop. The receiver chips designed in this paper support multi-CPU including ARM on chip and DSP (Digital Signal Processor) off chip. When developing basic algorithm, it can use the ARM in chip to simplify architecture and enhance the performance. When developing high-performance algorithm, it can conveniently use the DSP off chips.