The Realization Of The Speed Estimator Based On FPGA And Communication Design

Today, the vehicle has become a popular means of transportation into the thousands offamilies. Meanwhile, all sorts of problems caused by the vehicles have been shown,especially for the high traffic accidents. Now, it has aroused a widely attention in the society.Therefore, the security and stability of automobile became the main topics in the collegesand research centers. All kinds of active safety system have been arisee at the historicmoment, such as ABS (Anti-locked Braking System), ASR (Acceleration Slip Regulation),ACC (Adaptive Cruise Control), etc. The reliability of the vehicle active safety controlsystem often relies on the various state parameters of vehicles, such as vehicle speed, vehicleroll angle, tire pressure, etc. In real life, these parameters are usually not suitable for directmeasurement from the economic point of view. In order to solve this problem, this articleadopts an indirect method that designed the speed estimator and implemented the speedestimator on FPGA（Field Programmable Gate Array), the concrete research content asfollowing:At first, the structure of the vehicle, tire model and vehicle dynamics model would bestudied. On the basis of the knowledge, the eight degrees of freedom vehicle model would beset up in the MATLAB/Simulink. The vehicle model will be a subsequent simulationvalidation platform.Secondly, by searching and reading a large number of references, the appropriateestimation algorithm is selected, and the UKF (Unscented Kalman Filter) algorithm isadopted by a speed estimator based on the nonlinear characteristics of vehicle. Afterselecting vehicle state variable parameters, the vehicle’s discrete state equations and discreteobservation equation have been formed. After finish the speed estimator, the feasibility andeffectiveness of the estimator can be tested in eight degrees of freedom vehicle modesimulation validation platform.Thirdly, because the vehicle speed is a time-varying parameters, in order to meet thereal-time requirement, the hardware realization of the speed estimator choose FPGA. In theprocess of realization of hardware speed estimator, all the data use the binary single precisionfloating point numbers, which not only increased the range of speed, also increased theaccuracy of the speed estimator. After implementing the speed estimator on FPGA, we testthe vehicle estimator’s real-time capability and effectiveness through the joint simulation ofMATLAB and ModelSim. Simulation results show that the error of the speed estimator canbe controlled in20%, at the same time, the estimated time that run the speed estimator once time is58.42μs.Finally, through analysis all kinds of auto bus, choosing the CAN bus as the speedestimator’s data transfer bus. At the same time, the author introduces the MCP2515CAN buscommunication module and designs the communication program and the test experiment onthe basis of the MCP2515communication module.