Three-level Strategy Of Shunt Active Power Filter Control

With the rapid development of power electrics, more and more power electrnic devices are applied to various fields. Lots of them are non-linear loads. Power grid pollution is getting worse, real-time compensation for harmonic of grid is becoming increasingly important. In recent years, pollution is increasing due to large power,high-capacity APF is emerging, of which three-level topology is mature and widely used. In order to reduce the impact and coupling on the system and switch,operate easily, three level SAPF is becoming practical application of the mainstream.The topic about the control system of three level SAPF is analyzed and studied on the control strategy,launched mainly from the following aspects:First,from the topology of three level SAPF as a starting, paper established mathemtical model and decoupled,providing a theoretical basis for voltage and current control which occurred the next chapters.According to the actual capacity and control requirements, paper conducted selection and design for the capacitance and inductance involved in the actual circuit and mathemtical model.The overall control scheme of the system is proposed. The fundamental and harmonic are separated based on instantaneous reactive power theory, voltage loop control continue to use the traditional PI regulator, the embedded composite controller which consists of repetitive controllers and PI regulator in serise is used in current loop regulator. For the issue of three-level SAPF DC bus voltage imbalance of positive and negative side, this paper presents an approach named as "forecast-check-Fixed" real-time control algorithms based on zero-sequence voltage injection. The midpoint potential fluctuations is successfully solved. By theoretical analysis, simulation under Matlab/Simulink and experimental validation, paper proves the validity of the above control strategy.Hardware control system uses a DSP+FPGA framework, DSP will be used for locking, fundamental extraction, algorithm for outer voltage control and current inner compounding control, FPGA complete the midpoint potential balance control, protection, and carrier layered modulation. Parallel data bus communication is operated between the DSP and FPGA.