Design Of A2.5Gbps LVDS Transceiver

With the development of information technology, the amount of data transmission is more and more increasing. Due to its limitations, the traditional I/O interfaces can not meet people’s needs. LVDS transmission technology has low noise, low power, high reliability, saving cost and strong integration capability. So it becomes an effective technology to the solution of I/O interface.The thesis based on SMIC0.18μm1P6M CMOS technology and designed a2.5Gbps LVDS transceiver circuit. The LVDS receiver consists of two fully symmetrical circuit modules. The output signal of the two modules were cross-compared, thus the output signal is precise complementary differential. This circuit espands the common-mode and suppress the common mode noise. The LVDS driver consists of dual current source mode and the common-mode feedback (CMFB), to ensure the accuracy of the output common-mode voltage.Based on SMIC0.18μm1P6M CMOS technology, the simulations to the LVDS transceiver circuit were done. The swing of the receiver input signal are200mV and350mV. The frequency of the input signal is2.5Gbps, and taking into account the supply voltage fluctuation. The simulation results of the three process corners show that the parameters of the LVDS transceiver meet the LVDS standard. The rising edge jitter of the output signal of the LVDS receiver is about0.76ps. The falling edge jitter of the output signal of the LVDS driver is about0.18ps. The area of the2.5Gbps LVDS receiver layout is about83×44μm2, the LVDS transceiver circuit can be applied to a variety of high-speed data interface design.