| Recently, with the development of science and technology, the radar has becomean indispensable part of the modern warfare. Since the widespread use of Digital BeamForming (DBF) technology, the performance of radar has been greatly enhanced so thatit is more and more necessary to research the signal processing platform of DBFtechnology.The purpose of this thesis is to design a hardware system of multi-channelhigh-speed signal processing platform based on DBF, meeting the requirements of theapplication of various data rates. This thesis firstly establishes the overall architecture ofthe platform and in turn completes the design of the entire hardware system whichmainly includes signal processing module, control module, power module and signalacquisition module. Signal processing module is mainly responsible for implementingthe algorithm using Xilinx’s Viretx7series FPGA. Control module is responsible for theconfiguration of the whole system peripherals using Xilinx’s Spartan3series chips. Atlast the thesis completes the design of power module and other modules based on theactual system requirements and load conditions.After completing the hardware design of the whole platform, the input and outputinterfaces need to be designed. Firstly signal processing module is used to complete thepreprocessing which includes signal format conversion and sampling rate conversion.Signal format conversion is the conversion between double data rate (DDR) and singledata rate (SDR). Since the input and output data are both DDR, whereas SDR signal isneeded by signal processing module, so that data rate conversion is needed to be donefirstly. Owing to input/output device working under different clock, i.e. the samplingfrequency is different, so sampling rate conversion is needed to be done next. Then thepreprocessing is verified through the oscilloscope and spectrum instrument. Thecompletion of the preprocessing lays a solid foundation for the next verification ofalgorithm.Finally DBF algorithm is adopted to verify the hardware platform. Firstly DBFalgorithm is described in detail, and simulations are conducted through MATLAB. Next the implementation process of DBF is designed, and the implementation of thehardware platform is completed, which illustrates the entire hardware system can worksmoothly and stably. |