Design Of Power-on Reset Circuit And Low Power CMOS Crystal Oscillator Circuit

With the development of the market and the age of progress, the require forlow-power is increasing, which led to a new industrial revolution in the field of chipdesign. The continuously improvement of the process, the field of low-power designis more and more widely, from daily necessities to the field of electronic products,the use of low-powerand low-power requirements are also increasing, so，the designof a good low power consumption chip is particularly important for everone.when a chip with complete system which want to worked successful, you needan accurate clock signal to control whole system. Usually the signal structuresgenerated by the external crystal oscillator and internal circuit. when the chip workedwhole day, the crystal oscillator circuit power consumption usually is larger, thedesign of low-power crystal oscillator can greatly reduce the chip powerconsumption. during the process of charging the chip with electricity, the circuitoutputs a reset signal to initialize the overall circuit which needs to be reset, so thatthe circuit can worked normally in the next process, after the end of the reset, theend，the circuit generates the reset signal causes the crystal oscillator circuit to startup, and generates a clock signal. Power-on reset module together with the optimaldesign of low-power crystal oscillator module not only to make sure the entire chipsystem to work accurately, but also to have lower power conmsuption, lower powerconmsuption can effectively solve, which have the problems with the high powerbattery duration short, heat loss and other problems.This paper including that.1）During the process of charging the chip withelectricity, a reset signal of the power-on reset circuit is needed to guarantee normalwork of the chip. In order to solve the problems in traditional power-on reset circuitssuch as hard to control the pull level and reset time and so forth, a new structurewhich use the inverter trigging signal to set pull level and control the reset time by thecapacitances was proposed in this paper. This power-on reset circuit was verified inMXIC0.5μm CMOS technology. And the test result indicated that the circuit’s pulllevel is-4.5V, and the reset time is3.44ms with0V positive and-5V negative power.So this circuit can meet the engineering requirements well.2） A low power CMOScrystal oscillator circuit was proposed in this paper. a capacitor employed to couplethe transistor gates together in a inverter. The crystal oscillator created using such aninverter and biasing will operate at voltages substantially below sum of P and N thresholds and at a current level about one-fifith of that of a conventional CMOSoscillator. This low power CMOS crystal oscillator circuit was designed based onMXIC,s0.5μm CMOS process, the current consumption of the whole circuit is under750nA.; another LDO provides crystal-powered level structure, LDO low-powerbandgap reference and error comparator composition,3） using the LDO outputlower level of the power supply to the entire crystal module, the overall crystalcurrent consumption remained about2uA. Third low-power crystal oscillator moduleis to take a differential amplifier module, clever use of fixed gmvalue, can in the caseof multi-voltage start-up, and the MOS transistor are working in the subthresholdregion, the overall power consumption is also maintained at a low level, in the case ofto build2M crystal model, the overall power consumption is30uA.