Design Research Of Low Power Consumption Random Number Generator

Information security issues in the transmission and storage is becoming increasly prominent with the rapid development of network,information and micro electronics technology in recent years. The most important topic of information security in the field of hardware is how to design the high-quality random number generator chip. Chip random number generator is no exception that power consumption is the core problem of chip design in nowerdays. In addition, security of the sequence made by random number generator also determines its quality.Due to its special function, the timing requirements of random number generator are relatively less strict than other circuits. We’ve successfully designd a random number generator and taped out with using SMIC65nm process, and the RNG only needs to transport data to the external circuit by the frequency of2MHz, in the same time the power consumption reaches nearly10mW. We tried to solve this problem in this paper and designed a random number generator which is adapted to the low power consumption method. The important norm energy-delay product also got a certain degree of optimization.This design is also based on SMIC65nm standard process and we reduce the power consumption by cutting down the supply voltage. Standard supply voltage for this process is1.2V, and we design it to0.3V. We approach to achieve the whole design by a digital full-custom way. Firstly we designed the digital standard cells working at ultra-low-voltage and analyze their characteristics. Then we generated the corresponding standard file format and designed library unit with the help of EDA tools. Finally the layout is completed through the digital IC’s process.Using the full custom method not only helps us to analysis unit, more importantly, the standard cells designed and the database can be used as embedded IP unit in other circuits, thus enhance the usefulness of this design. In the design we select an10PAD the can be directly import the0.3V voltage, also and a circuit used in level conversion is designed, as a further protection for the practicality of this design.The power consumption maintained at the level uW showed by simulation and test, verified the circuit’s very low power consumption characteristics. Sequence generated by the random number generator also shows good performance.