Research Of Traffic Management And QoS Based On Packet Switching Chip

With the continuous development of the global Internet applications, the packet data continues to grow, the operators also get more and more traffic data. Because the applications continue to increase, it will lead to more and more business segments, how to guarantee the QoS of the packet is along with the phenomenon. The traffic management is the core unit of packet switching chip, it is critical to guarantee of the quality of service in the packet switching chip. Packet switching chip take a series of measures to meet the QoS requirements of different business According to the reasonable design, it can improve the capacity of data throughput, reduce the delay of data transport and congest. In recent years, traffic management is the core model of packet switching chip, it is also the hot and difficult point in IC design company.This article will overview the architecture of packet switching chips, according the traffic management module of chip internal to start the study QoS issues. By the careful analysis the function of TM, the traffic management module is divided into traffic classification, traffic monitoring, buffer management, queue scheduling and traffic shaping and so on. According carefully analyze the key sub-modules of TM, I will give some design and implementation of methods. Analyze the current algorithm of queue scheduling module, I will present a improved algorithm-IDWRR, which is based on DWRR, meanwhile I will use the NS-2to simulation. The simulate results show that the improved algorithm can improve the performance of queue scheduling in certain extent.