Modeling And Characterization Of Low Frequency Noise For Polycrystalline Silicon Thin-film Transistors

A new model for the1/f noise of polycrystalline Si thin-film transistors (poly-Si TFTs)is developed. The model adequately incorporates the grain boundary (GB) effect, differentfrom previous work however, the current noise is attributed to fluctuations in both carriernumber and effective mobility caused by carrier trapping/detrapping between the channelinversion carriers and the intra-grain traps within the GB depletion region. Because thegrain traps distribute with different location in the GB depletion region, the largedistribution of the trapping time constants in the1/f noise behavior is attributed to thevariation in carrier tunneling distance. The noise data are measured successfully of excimerlaser annealed (ELA) and metal induced crystallized (MIC) poly-Si TFTs. The model fitsthe noise data very well in the low drain current region, suggesting that the chargeexchange between the inversion carriers and the grain traps within the GB depletion regionshould be the major source of the1/f noise. However, the model fitting is lower than theexperimental data in the high current region, showing that the1/f noise becomes dominatedby the charge exchange between the inversion carriers and gate oxide traps. Based on themodel, the effective density of states of the intra-grain traps is obtained, providing afeasible method to evaluate the grain quality of poly-Si TFTs.