Design Of Wide Input Asynchronous Step-Down Dc-DC Converter With Constant Current

With the rapid advances in microelectronics technology, power management chip is developing rapidly in the direction of high performance, high efficiency and low power consumption. The study of various types of power supply design and application diversification is also increasingly active in order to better meet the power performance requirements of various electronic devices. With respect to the linear power supply, the switching power supply is widely used because it can provide higher efficiency and also can provide high current for the load.This paper introduces the basic operation principle, the modulation modes and loop control modes of Buck DC-DC switching power converters in detail. On the basis of the above, a wide input non-synchronous step-down DC-DC converter chip with constant current is designed. Input range of the chip is 10-40 V and internal pre-modulation circuit can convert relatively high input voltage to the low voltage of about 5V which provides power for the internal reference circuit to reduce the static power consumption. The chip integrating a high-voltage power switch tube can provide up to 3A output current and possesses an over-temperature protection circuit to ensure that the chip can operate reliably in harsh conditions. Adopting non-synchronous rectification technology, simple logic drive circuit and no zero-current detection circuit simplify the complexity of the system circuit design, reduce the chip layout area and save system cost. The paper proposes a novel design of constant current which has no need for the external accurate current sense resistor. In the case of ensuring precision of constant current, the method reduces chip peripheral devices and chip pin, saves system cost and improves the power conversion efficiency. The chip can choose to operate in either constant current mode or constant voltage mode. Using the peak current mode can achieve cycle-by-cycle current limit and improve transient response when input voltage or load changes. Adaptive slope compensation technique is used to stabilize the current loop. When the duty cycle is small, no compensation for sampling voltage is to improve load capacity and transient response of the chip. When the duty cycle is larger, sampling voltage is superimposed on a ramp voltage in order to eliminate the inherent instability of the current loop and avoid sub-ramp shocks. The chip can operate in CCM or DCM mode. When the load current is large, it operates in CCM mode. When the load current is small, it can operatein Burst Mode. In this mode, when the device enters sleep mode, turn off most modules, retaining only some basic modules, such as the reference circuit, oscillator and so on, so as to reduce the static power consumption and improve the efficiency of the chip at light loads. The chip also integrates short-circuit protection, output over-voltage protection, current limit protection and other functions to ensure that the chip achieves self-protection under abnormal operating conditions.Based on 0.35μm 40 V BCD process, the design and simulation of sub-module and system are accomplished with Cadence. Simulation results show that the chip achieves good features including constant current and constant voltage. Constant current accuracy reaches ±5%, constant voltage accuracy ± 2% and the highest efficiency up to 94%. The layout of the chip is accomplished and the chip is being taped out now.