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Design Of Linear Regulator Applied In Sensor Tag

Posted on:2015-07-10Degree:MasterType:Thesis
Country:ChinaCandidate:H L ZhangFull Text:PDF
GTID:2272330464956034Subject:Integrated circuit engineering
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Recently, the combination of Radio Frequency Identification (RFID) tags and sensors has become a hot research topic, so the power management becomes a necessary module for the electronic tag system and it also needs higher requirements of function and performance. Generally, the low-dropout voltage (LDO) regulator has the characteristics of simple structure, area saving, low power and easy integrating in the System On Chip (soc) and so on, so it was widely used in the HF tag systems and LDOs act as power supply to both the sensors and the system themselves. However, designing of this kind of LDOs also has lots of challenges. Firstly, the circuit needs a wider supply voltage region and which must works under a very low voltage and low power environment as the power harvested by the passive tags is changed with the changing of communication distance. Secondly, it needs a higher power supply rejection (PSR) in 13.56MHz and it also must consider the stability of the loop.This dissertation is based on the characteristic of sensor tags, designed a analog front-end which meets the requirement of the application environment. The principal research is low voltage and low power LDO, especially Sub-1-V Bandgap and POR.In this dissertation, it talks about the difficulties of the LDO which is used in RFID, and it also shows the available design specifications. At the end, it obtains the design parameters after optimizing and compromising. Under the traditional technologies and typical circuit structures this design had realized the application of ultra low voltage and low power dissipation by improving the op-amp’s structure. In the 130nm technology with all corners, the Bandgap’s voltage region is 0.7V-1.6V, the PSR inl3.56MHz is 60dB and 65.4dB at low frequency (LF), the power dissipation is 2.5μA. The static power dissipation of the LDO is 2.5uA,the PSR of LDO is 60 dB at 13.56MHz and 55dB at low frequency. The delay time of POR is about 50μs and the static power dissipation is below 0.2μA. Finally using the simulation software Spectre for circuit simulation and analysis, the post simulation results show that the designed circuits meet the design target.
Keywords/Search Tags:RFID, sensor electronic tag, LDO, Bandgap, POR, Low voltage, Low power dissipation
PDF Full Text Request
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