Research And Test Of A Low Quiescent Power Consumption Current Mode Synchronous Buck DC/DC Converter

In recent years, with the development of science and technology, many advanced and innovated technology are emerging, miniature、portable、simple and intelligent become the focus of the development of various types of electronic equipment and therefore it’s requirements for Switching Power Supply, which is the central unit of electronic equipment, have become more complex and diverse. Compared to the traditional linear regulators, switching power supply,with it’s high efficiency, small size and high reliability, has been widely used and become a vital part of all types of electrical equipment and integrated systems since it was invented.Combined with the needs of practical application, this paper presents a new kind of low power, current-mode, step-down DC-DC converter after a long time study of the related knowledge of switching power supply. The switching power supply presented adopts 2-phase, dual channel, peak current mode and Buck topology. In order to achieve the goal of low power, the DC-DC converter takes many measures like using synchronous rectification technology, multi-power supply and so on. Meanwhile the DC-DC converter has a internal phase-locked loop structure so that it can work in three fixed frequency or choose to follow the external clock and soft start provided by inner module lower the voltage peak, current peak and related EMI during the startup of the DC-DC converter.This paper begins with a brief introduction of some background knowledge and recent developments of switching power supply and then elaborates the basic knowledge including three basic topologies, control mode, modulation mode, as well as synchronous rectification technology and so on, which do foreshadowing for following design work. Then, based on the application requirements and theoretical analysis elaborated in chapter two, the overall framework of the converter is proposed and after which the peripheral devices are selected, power analysis and measures to reduce the power consumption are presented in chapter three. And then analyze some main inner analog modules like Bandgap reference, analog power supply modules, PLL, error amplifier, protection module and so on, which are designed and implemented by CSMC 0.5 μm BCD process. The simulation results, using Cadence and Hspice, show that all of the electrical characteristics can meet the specifications.Finally, this paper briefly introduces some knowledge related to layout, gives the overall layout design of the converter, concluded some parameters of Tapeout, test result and the experience about this project. The test result shows that the performance of this project can meets demand of the application and the design of this chip was basically completed.