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Research On One Cycle Control And Its Application In Cascaded Multilevel Inverters

Posted on:2016-06-30Degree:MasterType:Thesis
Country:ChinaCandidate:X X MaFull Text:PDF
GTID:2272330479493887Subject:Power system and its automation
Abstract/Summary:PDF Full Text Request
With the development of the power system, the demand of large power converter is grow-ing, and its application is also more extensive. Cascaded multilevel inverter topology becomesthe first choice of large power converter due to its modular structure. Cascaded multilevel in-verter has many advantages,such as output waveform with high quality, low switching devicestress and easy to extend, as a result, it is widely applied in high voltage direct current(HVDC)transmission, power quality control, high voltage motor speed control and photovoltaic powergeneration and other occasions.On the basis of existing cascaded multilevel inverter topology, the paper presents a newtype of cascaded multilevel inverter topology. Compared the traditional cascaded multilevelinverter topology with the new topology, the new topology needs fewer switching devices, andwith the same output voltage levels the switching devices of the new topology have a lowerwithstand voltage.When traditional one cycle control is applied in cascaded multilevel inverter, the outputvoltage waveform does not have ideal voltage levels. As a result, this paper combines onecycle control with carrier phase shift sinusoidal pulse width modulation(CPSSPWM) throughsample time staggered technique on the basis of traditional one cycle control, and proposes asample time staggered one cycle control strategy. The proposed control gets the advantagesof CPSSPWM. The proposed control technique gets the output waves staggered by delayingthe sample time, achievs the elimination of lower harmonics, improves the equivalent switchingfrequency of switching devices and the output waveform has good harmonic characteristics. Thepaper analyses the operating principle of proposed control scheme, and through the simulation inthe H-bridge cascaded topology and half H-bridge cascaded topology, the feasibility of proposedcontrol scheme in cascaded multilevel inverter is verified.
Keywords/Search Tags:Cascaded Multilevel Inverter, Topology, One Cycle Control, Sample Time Staggered
PDF Full Text Request
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