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The Research And Design Of Artificial Heart Valve Heart Sound Monitoring System Based On FPGA

Posted on:2015-06-17Degree:MasterType:Thesis
Country:ChinaCandidate:B B LiuFull Text:PDF
GTID:2284330467488528Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
Heart valve disease is a kind of usual heart disease. It usuallyuses the heart valve prosthesis toreplace the diseased heart valves, and then the function of heart recovers. In our country, thecorresponding nurse and follow-up visit of post operation can not be launched. So as that, thepatient was indirectly attributabled to death.Then, it is necessary to monitoring the patient’s heartvalve, the lesion of prosthetic cardiac valves can be find in the earlystage. In this paper, we had usethe heart sounds of patient as the object of study, in the research process, the modern electronicstechnique and the digital signal processing method were used. A heart monitoring system wasdesigned for the patient’s heart sound.In this article, the heart sounds was studied. As the heart sounds are the nonlinear and non-stationary random data, the formerly treatment methods had the limitations for this data, in thepaper, the new method of Hilbert-Huang Transport(HHT) to analysis the heart sounds, and thespectral analysis for heart sound was expanded. The short time average energy was calculated.These characteristic of heart sound had simulated in the Matlab.The core part of this monitoring system is the FPGA processing system. The SOPC techniquewas used to design the system. The design of software and hardware was stated in detail. Thehardware part coveres the heart sound sensor, the pretreatment circuit, the FPGA core circuit andthe display output circuit. After the acquisition of signal, the heart signals were pretreated to thevoltage signals, and it can be processed by the AD chip. Then the signals were analyzed by FPGA,the processingresults would be displayed on the displayscreen and completed the alarm function.The design of software part was based on the SOPC technique, the schematic document wasbuilt and it was set as the top document in the QuartusⅡ.The configuration of Nios software CPUwas completed in the SOPC Builder, the necessaryIP core and the peripheral also should be added.After this part design, the module of each function part (collection and storage, feature extraction,displayand alarm, etc.) was designed byC programminglanguage in the NiosⅡ.At the end of the paper, the runningstatus of the system was explained, and theanalysis of therunningresult has been listed. The result showed that the system can reveal the real-time status ofthe heart sounds from thepatient, and the feature detection of heart sound was completed at thesame time.
Keywords/Search Tags:heart soundmonitoring, FPGA, HHT, NiosⅡ
PDF Full Text Request
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