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Design Of An Front-end Amplifier Chip For Bio-potential Acquisition

Posted on:2015-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:S J ZhuFull Text:PDF
GTID:2298330422488811Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of the analog integrated circuits and electrodetechnologies, bio-potential acquisition system (BPAS) shows huge marketvalue and wide potential in various fields, such as medical diagnosis,brain-machine interface (BMI), brain-controlled limb prostheses, etc.Portable and implantable integrated systems have been a hotspot in thearea of BPAS. This thesis aims to design one of the most critical blocks inBPAS, that is, the front-end acquisition amplifier, as part of a whole BPASbeing developed by our group.The main challenges in the design of the front-end amplifier are lowpower consumption and low noise, which is considered throughout thewhole design process. Capacitance coupling structure is adopted, whichcan improve the gain accuracy and effectively minimize the electrodeoffset voltage with no addition to noise and power. Considering thevariations of process, environment and power supply, tunable bandwidthand variable gain are needed, which can also be used for detecting differentbio-potential signals. In our design, transistors operate in different workregions, namely weak, moderate, or strong inversion, to optimize the noiseand power performance. As a key circuit module in the front-end amplifier,the pseudo resistor is studied intensively. Several ideal behaviors of thepseudo resistor are considered, including dc offset, signal distortion. As aresult, a novel pseudo resistor with better performance is proposed basedon those traditional ones. What’s more, several design methods are adoptedin layout design to minimize MOS mismatch and shield circuits from thesubstrate noise. At last, a testing PCB for the amplifier is designed and thetesting platform is constructed. In addition, some simulation techniques and practical lore are explained.The chip is designed under0.18μm1P6M CMOS process and hasbeen taped out already. Simulated characteristics of the front-end amplifierinclude power consumption of1.19μW at1.8V, integrated input-referrednoise of2.48μVrms over the1Hz-300Hz frequency range, tunable gainranging from50dB to70dB, tunable high-cutoff frequency changing from110Hz to320Hz, programmable low-cutoff frequency ranging from0.8Hzto100Hz and the noise efficiency factor of4.4at world-advanced level.
Keywords/Search Tags:Bio-potential acquisition, front-end amplifier, low powerconsumption, low noise
PDF Full Text Request
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