The Technology Of STBC And SC-FDE In MIMO System And Their Implementation In Multi-Core DSP

From2G to4G, the requirement of speed in wireless mobile communication become higher, and varies of ways have been tried to improve the speed as well as the spectrum efficiency of radio link. MIMO for its ability to improve the capacity and efficiency of wireless communication system has become the current mainstream communication technology. STBC is the representative technology in exploiting special diversity, and SC-FDE is the main equalization technology in broadband mobile communication.This paper first analyzes the STBC which is an effective anti-fading technology using2antenna transmitting scheme and the ML(maximum likelihood)estimation to obtain full antenna gain. Considering that many radio channels include frequency selective fading, we use STBC in combination with SC-FDE, and analyze the simulation result of different combinations of these2techniques. We find out that with the help of SC-FDE, a STBC system can substantially reduce computational complexity, improve the efficiency and convergence without losing any of its diversity gains.On the basis of algorithm study, the paper goes on to discuss the implementation of the proposed STBC-SC-FDE system in hardware, aiming for a solution of realization that is close to the actual algorithm simulation results. We intend to use TI’s TMS320C6678fixed/floating-point DSP chip in consideration of the high multiply-add operation in the algorithm. In order to achieve industrial applicability, the article also highlights the optimization procedures aiming at C6678Keystone DSP architecture in order to shorten the processing time of the chip. The specific measures include using library and inline functions are used, optimizing operation system, using software pipelining and storage structure design, in which any of these procedures have their direct relationships with the final performance of the code.Our research suggests that the combining STBC and SC-FDE system can obtain the full diversity gain and effectively combat the inter-symbol interference. What’s more, the improved STBC decoding algorithm makes its combination with SC-FDE as well as their implantation in DSP much easier. The implementation in DSP takes both system BER performance and processing time into account and improves the overall performance by taking advantage of the keystone8-core parallel computing architecture and hierarchical storage characteristics, using a more efficient synchronization method, introducing thread module, designing Ping-pong buffer to increase the degree of parallelism and fully optimizing the use of circulating water and cache, so that the overall system throughput reaches3-4times more compared to the unrefined code, which gives the work of this paper a higher industrial value.