Research And Design Of RF Front-end ICs For UHF RFID Receivers

RFIDs are a kind of automatic identification of non-contact technology, which can read andwrite through the radio signal to identify specific targets and related datas. The UHF RFID has thefeatures of long distance identification, quick communication and reading several labels at one time,etc, therefore, the UHF RFID reader has been widely used. As the key part of the UHF RFID readersystem, the design of the front-end RF circuit has become the research hotspot and difficulty.A double mode RF front-end circuit structure is proposed after researching analysis of thecurrent challenges of receiver RF front-end circuits. Compared with several kinds of UHF RFIDreceiver system structures, the direct conversion receiver system architecture is selected. For thedouble mode RF front-end circuit, a double mode LNA, a direct conversion mixer and the cascadeof both have been designed in Standard0.18μm RF CMOS process, which have been used forsimulation, layout, post-simulation and measurement.The double mode LNA meets the different requirements from listen and talk operation modes.The low-noise amplifier is able to switch between high-gain mode and high-linearity mode freelyby a switch-controlled double-mode biasing circuit, to avoid being affected by PVT variationsthrough ultilizing the replica biasing technique, to improve the linearity and noise figure byemploying the common-mode feedback technique and cross-coupling capacitance technique.Measurement results show that, under different PVT conditons, with the high-gain mode, it can beachieved that a gain of9dB, noise figure of3.5dB, and P1dBof-10dBm; and with the high-linearitymode, it can be obtained that a gain of4.1dB, noise figure of5.5dB, and P1dBof-3.5dBm, whichdesired the requirement.The cross-coupled common-gate stage was adopted as the input stage of the high linearity mixer,which achieved high saturation level to get high linearity, the technique of cross-coupling improvedconversion gain and noise figure, dynamic current injection structure was adopted to decrease theflicker noise. This paper designed the replica biasing circuit to restrain the influence of the changeof PVT. The simulation shows, during the PVT changes, the conversion gain is4.5dB, noise figureis15dB, and the P1dBis-0.35dBm.The double mode LNA and the high linearity mixer are connected with the way of capacitancecoupling. The high impendence of PMOS has been used as the output load for the double modeLNA, which can form a cascade structure of impendance matching with the high input impedance transductance of mixer. One couple of capacitance has been adopted for matching and isolation. Thesimulation results show that the front-end RF circuit of this paper meets the requirements of systemdesign.