Implementation And Verification Ofkeytechnologies Of New Generation Powerlinecarrier Transmission

Power Line Carrier Communication transmit carrier signal by lines in power system communication. Since the transmission lines have very strong support structure and erection of more than three conductors, so transmission lines transmit the carrier signal while deliver frequency current, which is both economic and very reliable.The reserch and utilization has become the unique means of communication of world’s all electricity sector priority, caused widespread concern. In this paper, power line carrier communication’s key technologies are researched and use TI’s DSP chip to implement and optimize, and finally completed the verification of results. The main contents include three parts:(1)The in-depth study of physical layer protocol of power line communications is conducted and determine the physical layer algorithm structure, PLC-carrier transmission’s using OFDM, in accordance with the algorithm structure and frame structure specific physical data processing layer; in addition to the physical layer protocol, another key technology related with PLC transmission’s is to detect short-wave and medium-wave radio station, and its algorithm principles, procedures, and DSP implementation are described.(2)The second part describes the principle of RS encoding, RS decoding, convolution encoding, Viterbi decoding, interleaving, de-interlacing,π/4DQPSK modulation, as well as implementation and DSP program optimization using TI’s TMS320C6416DSP chip, the programming optimization efficiency has been greatly improved, the paper gives comparison of the CPU cycle consumed by program before and after the optimization; furthermore elaborated short-wave and medium-wave radio detection algorithms and DSP implementation.(3)The last part of the paper verifies the previous results. The first is the module validation, matlab simulation results and DSP implementation results are compared for each module, and then verify the transmitter and receiver results, and finally we commit DSP and FPGA overall joint debugging other parts of the combination of physical layer protocols to verify the correctness of the overall result.