Research On Thermal Optimization Of Three-Dimensional Integrated Circuit Based On Area Extending And Thermal Through Silicon Vias

With the development of the technology of integrated circuit, the integration of a transistor on the chip is bigger and bigger after Moore Era. Facing the condition that the traditional two-Dimensional Integrated Circuit(2D IC) cannot load cases, people are turning to the research of Three-Dimensional Integrated Circuit(3D IC). Three-dimensional integrated circuit realize the communication between upper &lower layers with Through Silicon Via on the z direction, through stack layers makes the chip packaging size reduced, interconnect length shortened compared,transmission signal bandwidth high, These characteristics of the advantages without in the traditional chips, what make 3D IC become a research hot point in recent years.Although 3D IC can solve the bottleneck problem of traditional 2D IC, but with the increase of integration, high density integration of active components make heating problem of 3D IC becomes more and more serious, and the multi-layers stack can make packaging size reduction but also brought challenges for heat dissipation. In addition, because material of the bonding between layers has low thermal conductivity coefficient, it’s also difficult to transfer heat to the outside in the layers away from the heat sink, hotspot’s temperature too high not only affect the performance of the chip, and even bring serious threat to the reliability of the chip. Therefore, realize 3D IC must solve the problem of the heat first, that is why the heat problem of 3D IC become the hot point in present research.In order to reduce the highest temperature of the chip, balance the heat problems.It is mainly from two aspects to optimize the heat problem in the 3D chip as following,1. Firstly the constraint of power density should be added to the traditional simulating annealing algorithm. The circuit module will be divided into the appropriate layer, making the hotspot in a more balanced distribution in the whole chip.2. Then the density of the power consumption in the hotspot should be reduced by extending the appropriate hotspot area in the x/y direction on each layers, and the Thermal Silicon Vias should be inserted in the z direction to transfer heat within the chip. It is can effectively transfer heat in the inner layers to outside. Simulation experimental results show that based on the optimization method the highest temperature can effectively reduced. The heat distribution is more balanced with the optimization. The gap between the maximum temperature and minimum temperature in 3D IC layers is significantly reduced. The highest temperature between layers further is reduced compared with before optimization. This indicates that the optimization method can effectively control the temperature of the chip, balance the heat.Heat as a problem needed to resolve, we should consider in 3D IC design phase. As a result, the method for considering heat problems in the implementation of the 3D IC design has a certain guiding significance.